Starlight: The Ultimate Simulation Computer
_ Starlight
_.. the Ultimate Simulation Computer
STARLIGHT is an extremely fast Real Time Simulation Computer that dramatically reduces the time
required lor continuous system simulations and dynamic systems modeling. It is designed to provide
superior computing power for projects with time-dependent calculations, simulations, hardware-in-the-
loop testing, or any situation where results are needed in real time or faster.
The workstation size and low price allows companies to bring product testing and design in-house,
expand previously limited testing, or decentralize simulations to achieve results in less time.
STARLIGHT
mnovations inciuct
these FEATURES
© Efficient Data Flow
Architecture
© Integrated
Hardware /Software
© Simulation Code
implemented
directly (not mapped
to FORTRAN)
» Optimized
serial / parallel
operations for
maximum speed
" Total solution (not
just an accelerator
board)
STARLIGHT's tremendous
speed opens the way to additional,
more diverse or complex projects.
This increased simulation speed is
achieved through a digital imple
mentation of analog computing
architecture. Now there is time for
more thorough testing without
project delays, improving design
dependability.
This not however,
does mean,
Complete STARLIGHT System
increased operation complexity or
costs. STARLIGHT, only a small
workstation-like tower unit, out-
periorms higher cost conventional
Simulation systems traditionally
needed to achieve this perfor-
mance level. Since it operates in a
normal olfice environment, this
simulation power is available right
at the engineer's fingertips,
STARLIGHT is controlled from an
STARLIGHT
BENEFITS over
traditional simulation
methiocs tnecehuice
© Significantly
reduced size
© Drastically lowered
price
» 10-100 times
perlormance
Increase
»" Power to handle
larger, more
complex
simulations
© Ability to function
in a normal
office environment
X-Terminal user station with a
Standard X-Window/ Motil inter
face. STARLIGHT can just as
casily connect to your present
System as it can stand alone.
There is no need to completely
revamp your lab. When compu-
ting power must be increased, you
now have a better choice without
the usual additional large invest-
ment.
USER INTERFACE
STARLIGHT has a standard work-
station for user interaction, con-
trol and graphic display output.
The system can also be used with
your existing workstation or termi-
nal with an Ethernet link and X-
Terminal capability. Users would
then have access to STARLIGHT
from any site on the network. You
can run ae simulation on
STARLIGHT, continue with other
work while the simulation is run-
ning, examine the results on a
local terminal, and pull simulation
data into other software packages
as needed for analysis or reports.
STARLIGHT operates through a
menu system with integrated help
screens, Set-up, parameter chang-
ing, run sequencing, recall,
searches, and other operations are
all executed in a few keystrokes or
menu selections. Simulation out-
put is presented to the user in
either graphical or tabular form.
Analog outputs are also available
for plotters, scopes, etc, as well as
digital output for slave monitors,
mass storage systems, or data
transfer to other computers.
SYSTEM ARCHITECTURE
One olf STARLIGHT's benefits is
its significantly smaller footprint
when compared to the much larg-
er size of a traditional system
needed to match its extremely
high level of computing power.
This is achieved through a unique
hardware architecture, bringing
system computing size to the
board level.
The heart of the system is the
ARITHMETIC COMPUTATION
MODULE (ACM). This primary
computational component is a
unique floating-point, pipelined
parallel processor designed and
built by EAI specifically for model-
ing continuous dynamic systems.
A single ACM can run simulations
30 to 100 times faster than a
microprocessor-based worksta-
tion, and 5 to 10 times faster than
a Supercomputer costing tens of
millions of dollars. The system will
accommodate up to three addi-
tional ACMs (four total) for very
large simulation models or to meet
further speed requirements. Speed
is the key to putting results in
your hands so decisions and mod-
ifications are implemented in
much less time.
Each ACM provides up to 128K
words (512K bytes) of data memo-
ry for function generation and
data logging. For applications
requiring more than this, an
optional DATA MEMORY MOD
| § |O\'\)) provides up to 64 mil-
lion 32-bit words (256 million
bytes) of additional indexed data
memory. This supports very large
data tables for functions of up to
eight variables, and high-speed
logging of many channels of data
for additional post-run analysis on
STARLIGHT or your system.
STARLIGHT includes a Host
processor housed in an industry
standard VME chassis, running
under the UNIX operating system.
During problem preparation, the
Host performs editing, compiling
and linking tasks and loads the
simulation model. During run-
time, the Host supports menu-
based user interaction, real-time
data-logging, and graphic display.
For connection to external equip-
ment such as flight tables, lab
instruments, or other computers,
a wide range of |/O options is
available:
@ The ANALOG INTERFACE
MODULE (AIM) provides 16
Analog-to-Digital Converters
(ADCs) and 16 Digital-to-Analog
Converters (DACs) with control
circuitry for continuous analog
hardware-in-the-loop communica-
tion. The system can accommo-
date up to 4 AIMs, for a total of 64
channels in each direction,
@ The DIGITAL INTERFACE
MODULE (DIM) provides 32 dis-
crete digital inputs and 32 discrete
digital outputs to communicate
with digital hardware-in-the-loop.
Four DIMs maximum allow for
128 discrete channels in each
direction.
@ The PROCESSOR INTERFACE
ADAPTER (PIA), and the PROCES
SOR INTERFACE MODULE (PIM)
with its dual-port memory (32 bits
wide), provide the link between
STARLIGHT modules on the VME
bus and the STARBUS. Three
additional PIMs can provide inde-
pendent run time communication
with up to three different external
processors, providing a data path
into an existing computer system.
@ An optional ([NITERNAL
SEQUENTIAL PROCESSOR (ISP)
is available for simulations that
require sequential code (for exam-
ple, simulation of a continuous
system controlled by an embedded
microprocessor). The ISP is
housed in the same VME chassis
as the Host processor, and runs
without operating system over-
head for maximum speed. The ISP
may be programmed in any stan-
dard sequential language, such as
FORTRAN, C, or Ada, and commu-
nicates with the ACMs via the
standard PIA/PIM modules.
The SYSTEM CONTROL MODULE
‘SUM provides the centralized
program counter, which is distrib-
uted to the other processors and
[/O modules to synchronize the
entire simulation. The program is
loaded into the ACMs, DIMs,
DMM, AIMs, and PIMs through
the Host processor on the VME
bus and the SCSI INTERFACE
MODULE (SIM) on the STARBUS.
The SIM also monitors results
between tests and will run diag-
nostics via the SCSI bus.
A key element in achieving
STARLIGHT’'s high performance
in computation speed and real
world interconnection is the
S'tAKDLS. Designed by EAI, the
STARBUS operates at a true 80
MB/sec sustained transfer rate.
Hardware-in-the-loop connections
come directly into the STARBUS,
which operates at rates 2-4 times
faster than conventional real world
links. Not only does STARBUS
allow STARLIGHT’'s various mod-
ules to perform their calculations
at tremendous speeds, but it also
receives data from and transmits
results to your hardware-in-the-
loop at increased rates. The com-
oo EE EE eEO“s.eRee..PaaaeaaasaSS2.°.0Q_QQaQxagagaxaxgQaxQQxQQQ05030©hO .Saa_aQmm_m EE
Logic 1/O
w/External
Hardware
Double Sided
Backplane
Analog 1/0
w/External <«
Hardware
Basic System
=
Required minimal
configuration.
Provides a
complete stand-
alone system with
internal data
logging from
simulation
equations,
Digital 1/O
w/External
Processor
STARLIGHT System Components. All components shown (except workstation) are housed in a single tower unit,
bined result of STARLIGHT's
computation speed with the high
STARBUS throughput rate and
automated scheduling means a
more efficient operation and faster
results in your hands,
PROGRAMMING
METHODOLOGY
Your simulation model is pro-
grammed using the >) \iiii 1)
INTERACTIVE SIMULATION
LANGUAGE (SISL) which con-
forms to the industry-standard
CONTINUOUS SYSTEM SIMULA-
TION LANGUAGE (CSSL) specifi-
cations, freeing you from the
details of numerical integration
methods and sorting considera-
tions. A continuous parallel sys-
tem is modeled in a continuous
parallel language, enabling you to
model the system simply in terms
of differential equations or transfer
functions, WITHOUT THE NECES-
SITY OF TRANSLATING A PARAL-
LEL MODEL INTO SEQUENTIAL
CODE. For applications requiring
sequential code, the ISP may be
programmed in any standard
sequential language (e.g, FOR-
TRAN, C, or Ada).
Most currently available CSSL
implementations translate the
users CSSL source program into
an intermediate FORTRAN or C
format, which is then compiled
and executed in the usual man-
ner. If speed is not a major
concern, this simple approach is
adequate. However, if parallel
processors are used for speed, the
compiler is forced to search this
FORTRAN or C program for oppor-
tunities to “parallelize” it (despite
the fact that the original problem
was parallel in the first place). In
contrast, the STARLIGHT compil-
er maps the SISL source directly
into parallel machine code, omit-
ting the intermediate step.
Result...a more efficient program.
The availability of both SISL (for
continuous parallel simulation)
and FORTRAN, C, and Ada (for
standard sequential programming)
means that you can convert a
module at a time from current
programs, either to break up the
conversion task or perhaps to run
a particular component at a faster
rate. You may also want to isolate
a particular task that requires
maximized computation power.
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MOTOROLA MOTOROLA ENCORE ENCORE INTEL CRAY STARLIGHT
68030 680-40 32/87 2040 $860 Y-MP
Measured speed for a typical non-linear dynamic simulation with 20 integrations
WHY STARLIGHT EXCELS
STARLIGHT’'s unique hardware architecture — cal equation and function generation statement
combines with the efficiency of the STARLIGHT into fundamental mathematical operations. It
INTERACTIVE SIMULATION LANGUAGE (SISL) then automatically schedules the calculation
to create a totally linked system. STARLIGHT and memory I/O code sequences to utilize the
handles the implementation of differential and available hardware to its maximum physical
algebraic equations, logic equations and func- _ efficiency. In this way, STARLIGHT achieves
tion generation in a manner analogous to how computing speeds that far surpass any sequen-
they would be ideally programmed and run on _ tial approach used by single processor, multi-
a completely parallel multiprocessor computer. processor, or other parallel systems on the
The SISL software breaks-up each mathemati- market today for this type of application.
WHEN YOUR APPLICATIONS ARE FOR REAL...
..EXPLORE THE POSSIBILITIES WITH SJ ARLIGHT.
Electronic Associates, Inc.
185 Monmouth Parkway, West Long Branch, NJ 07764-9989 (906) 229-1100
Toll Free: 1-800-631-4198 Fax: 1-(906)-229-1329
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