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Instruction: Manual
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Analogue Computer
SCD 10
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THE SOLARTRON ELECTRONIC GROUP LTD
FARNBOROUGH - HANTS - ENGLAND
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SCD 10 ANALOGUE COMPUTER
MAINTENANCE MANUAL
FOREWORD
he SCD 10 analogue computer is a small general purpose machine suitable as a design tool
or as an educational aid. It comprises ten drift-corrected D.C. amplifiers, each of which may be
used for summing, sign reversing, or integrating; twenty-four potentiometers, a patching panel,
computer control facilities and built-in power supplies. An additional ten amplifiers can be
incorporated, these can be used as 2 input summers. Simple non-linear elements are included,
and servo-multipliers are readily incorporated to expand the scope of the computer. Two SCD 10
machines may be used in conjunction with one another, with one control unit operating both machines.
The following problems are typical of those which may be solved on a single SCD 10.
(a) Single differential equations of up to fifth order.
(b) Two simultaneous differential equations, up to third order.
(c) Multiple loop servo-systems.
(d) Aerodynamics simulation for guided weapon control systems.
) Dynamical mechanical systems, of for instance, the mass, spring, viscous damping
type.
Issue : Two
Mod. Ret.
Date : July, 1963.
THE SOLARTRON ELECTRONIC GROUP LIMITED
Victoria Road, Farnborough, Hampshire, England.
Telephone: Farnborough (Hants) 3000
Telex 8545 Solartron Fnbro
Cables: Solartron Farnborough
Printed in England
=
Section 1
Frontispiece
Fig. 1
10
11
12
13
14
15
LIST OF
Technical Description
Installation
Test Procedure
Breakdown Instructions
Components List
CONTENTS
List of Illustrations
Basic SCD 10 Computer
Circuit Diagram - Central Overload Indicator
Circuit Diagram - + 100V Reference Power Supply
Circuit Diagram - Repetitive Timer
Circuit Diagram - 24V DC Relay Supply
Amplifier Patch Panel Functions
Servo Multiplier and Resolver Connections
Component Identification
Component Identification
Component Identification
Component Identification
Component Identification
Component Identilication
Component Identification
Circuit Diagram SCD 10
Circuit Diagram SCD 10
- Rear View with Panels Removed
- Patch Panel (A Bank)
- Patch Panel (B Bank)
- Control Panel
- + 1U0V Reference Supplies
- Control Panel,
Overload and Timer Circuits
- 24V and Fan Supply Unit
Sheet 1 _ )
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Sheet 2 )
Page
18
20
IV
34
34
35
96
Inside
Rear
Cover
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Frontispiece Basic SCD 10
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SECTION 1
TECHNICAL DESCRIPTION
General
1; The SCD10 Analogue Computer is housed
in a console type cabinet. In its simplest form
it consists of the following sub- assemblies.
(1) Control Panel
(2) Patch Panel
(3) Five drift-corrected Operational
Amplifier Units Type AA.1054
(4) Computer Power Supply Type AS. 1104
(5) Air Blower.
Provision is made to extend the scope of
the computer by the inclusion of an extra five
dual operational amplifiers, (summing only)
and also the addition of non-linear units such as
servo multipliers, servo resolvers, diode func-
tion generators, electronic multipliers (time
division).
Details of these additional units and their
respective conversion kits are given in the
appendices at the rear of the manual.
2: The five twin computer amplifiers are
carried in one amplifier Mounting Unit Type
TX.1269 (Rack A).
Since the SCD10 handbook includes copies
e instruction manual for the modules
iated with the basic SCD10 computer viz:
(a) Operational Amplifier Unit AA. 1054
(b) Computer Power Supply Type AS. 1104
(c) Amplifier Mounting Unit Type TX. 1269
these component equipments will not be further
considered here.
CONTROL PANEL
Function
4, The panel provides a central control point
for the relays, switching the input resistors and
feedback elements associated with the opera-
tional amplifiers. It contains certain electronic
circuitry for the control and operation of the
computer, and provides power reference voltage
and amplifier output monitoring facilities. The
24 co-efficient setting potentiometers are also
mounted on the control panel.
Panel Fittings .
5. The control panel carries the controls,
indicator lamp and meter as listed.
RV3 REFERENCE potentiometer
RV6-RV9 _ Earth-free potentiometers num-
bered 1-4
RV10-RV29 Earthed potentiometers
SW1l Overload HOLD switch
SW2 Amplifier OUTPUT SELECTOR,
eleven position
SW3 Function selector, eight position:
POT SET; PROBLEM CHECK;
COMPUTE; HOLD; REP; 1, 2
and 5 sec.
SW4 Meter switch, 8 position, +300V,
-300V, -200V, +100V, -100V,
+30V, V, NULL ‘
SW5 Internal or external *100V key
switch for use with RV3
SW7 MAINS switch
SW21 Meter switch for 10V range’
SW22 Meter switch for 1V range
SW25-SW28 Key switches for RV6-RV9
SW29-SW48 Key switches for RV10-RV29
M1 Meter centre-zero f.s.d.
100p2A -0-100pA
LP1 OVERLOAD indicator lamp (red)
LPl POT SET indicator lamp (blue)
LP3 PROBLEM CHECK indicator lamp
-(orange)
LP4 COMPUTE indicator lamp (green)
LPS HOLD indicator lamp (red)
FS1 Mains fuse
JK1 Jack socket for monitoring compu -
ter amplifier output voltages by
means of a digital voltmeter
SK2-SK6 Recording outlets (refer para-
graph 52)
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Additional Facilities
(Rear Panel)
6. SW10 A three- position selector switch
used only when a diode tunction generator is
fitted into the computer (refer Appendix B).
Central Overload Indicator
(Refer Fig. 1)
ts The overload circuit gives visual warning
at the central control panel when any One or
more of the operational amplitiers runs into a
signal overload condition, and also when the
+300V and -200V HT lines are overloaded. The
circuit employed is of the monostable type
triggered by positive pulses from a high gain
two stage amplifier consisting of two pentode
valves connected in cascade to give high sen-
sitivity.
8. The overload outputs on the individual
amplifiers of rack A are commoned and con-
nected through pin 15 of SK14 to the input of the
control panel central overload indicator. When
additional operational amplifiers are fitted
(rack B) the overload outputs from these indi-
vidual amplifiers on rack B are commoned and
fed to the overload circuit through pin 16 of
SK14. In the event of an overload on the +3800
volt and -200 volt lines from the power supply
AS.1104, a pulsed overload signal of 18 volts
approximately is fed from the AS, 1104 to trigger
the central overload circuit. The overload indi-
cator lamp on the power supply AS.1104 will
also begin flashing, thereby indicating that the
overload exists on the main HT lines. This
overload Signal from socket SK6 on the HT line
of the power Supply is fed through to pins 7 and 8
on SK14 and then into the central overload indi-
cator circuit. When servosare fitted, the over-
load signal from these are also fed through to
the central overload circuit through pins 7and8
on SK14.
On applying power to the overload circuit
the OVERLOAD indicator lamp will light, but
this will be extinguished when the HT supply
becomes available and valve V2B passes anode
current to pull-in relay RLD/2. All signal
inputs applied to the overload circuits are fed
through a 1M‘: resistor and thence to the grid of
the pentode V12. Output signals from V12 are
capacitively coupled onto the input grid of pen-
tode V1. Signal input to this grid is limited to
approximately L00mV peak: to-peak by the silicon
diodes MR1 and MR2. The output from the
anode V1 is coupled to the grid of V2A via the
clamping circuit C2, MR3, MR4 and R8. The
voltage drop across resistor R16 establishes the
reference potential of the clamp which is
approximately 10 volts negative with respect to
the potential of V2B grid. Thus any positive -
going pulse having an amplitude greater than 10
volts will trigger the uni-vibrator V2. The filter
circuit comprising R7 and C18 serve to reject
noise voltages generated by power switching and
relay operation which might otherwrse trigger
the monostable and signal a spurious overload.
In the stable condition V2B will be conducted and
V2A will be cut off by virtue of the bias potential
developed across the common cathode resistor
R10 by V2A anode current, which also holds in
relay RLD/2. On the incidence ofa positive pulse
of sufficient amplitude (greater than 10 volts) at
the grid of V2A, that valve section will pass
anode current and regeneratively cut off V2B.
Relay RLD/2 will thereon drop out and contact,
RLD/1 will close to energise indicator lamp
LP1 and thus signal an overload condition,
refer Fig.10. The association of V2B anode
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Circuit Diagram
- Central Overload Indicator
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current removes the cathode bias potential hold-
ing V2A at cut off, and this valve again conducts
to restore the monostable to its stable condition.
Capacitor C3 will now discharge through resis -
tor R14 since it cannot discharge through MR5
and MR6. The negative potential on the grid of
V2B will decrease until that valve again passes
anode current to pull-in relay RLD/2. The
tuume constant of the discharge path is approxi-
@tely 1 sec, so that providing the overload is
*guntained, it will be signalled bya series of
a$hes from LP1.
-100 Volts Reference Power Supply
(Refer Fig. 2)
J. The -100 volts reference supply is derived
from a degenerative amplifier type of stabiliser
whichitself is powered from stabilised voltages
provided by the power supply Type AS, 1104.
10. The circuit employs four valves; a gas
discharged voltage reference tube V7, a double
triode differentialamplifier V5 drivinga pentode
amplifier V3, and a pentode series control valve
V4. The power for the circuit is derived from
the stabilised -200 volts and -300 volts source,
with the exception of V5B anode which is returned
to the commonrail. The grid potential of V5B
is held at a fixed negative value with respect to
the common rail by the voltage reference tube
V7 which has a burning voltage of 85 volts.
Resistor R32 and capacitor C9 form a filter to
*100V Reference Power Supply
remove ripple voltage from the reference poten-
tual, in the interest of hum reduction. Resis-
tors R23 and R24 and RV1 form a sampling
chain connected across the common rail and
-100 volts rails to provide the signal input to
the differential amplifier.
Assuming that the potential of the -100 volts
output Supply has moved in a negative direction,
then the grid potential of V5A will go positive
with respect to the cathode.
The increased anode current of V5A will develop
a greater bias voltage across resistor R33, and
since the grid») potential of V5B is held constant
by V7, V5B anode current will decrease and the
control grid of V3 will move in a positive direc -
tion. A resultant negative-going signal appear -
ing at the anode of V3 is applied to the grid of
the series control valve V4 to increase the
effective DC resistance of that valve, and thus
of{-set the rise in output voltage which initiates
the regulation cycle. Variable resistor RV1
enables the potential of the stabilised reference
supply to be accurately set at -100 volts.
+100 Volts Reference Power Supply
(Refer Fig. 2)
ll. The +100 volts reference supply is derived
from a degenerative amplifier type of stabiliser,
which itself is powered from stabilised voltages
provided by the power supply Type AS. 1104.
12, The circuit employs three valves, a
double -triode differential amplifier V9 driving
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a pentode amplifier V8, and a pentode series
control valve V6. The reference voltage to the
differential amplifier is provided by the -100
volts supply. The sampling chain providing the
signal input to the differential amplifier is made -
up of resistors R45, R46 and RV2. The grid of
V9B is returned to the electrical centre of this
voltage dividing network, so that the grid poten-
tial is essentially that of the common rail, as
also is the grid potential of VIA. Assuming
that the voltage of the +100 volts supply moves
in a negative direction, e.g. to 90 volts, VIB
grid potential will move negatively, and the de -
creased anode current will reduce the bias
voltage developed across R47. The anode
aarrent passed by V2A will thereon increase to
fuice a negative-going signal at the anode.
yin turn drives the grid potential of V8 ina
. ive direction, and the resultant positive -
going Signal appearing at the anode of V8 is
applied to the grid of V6 to decrease the effec-
tive d.c. resistance of the series control valve.
Variable resistor RV2 enables the potential of
the reference supply to be accurately set at
+100 volts.
Repetitive Timer
(Refer Fig. 3)
13. The repetitive timer consists of an elec-
tronic timing device triggering a monostable
circuit, which in its stable condition switches
the instrument to COMPUTE for a periodofone,
two or five seconds, as determined by the timer,
and in its unstable condition switches the
computer for a one-second reset period.
The. timing circuit consists of a Miller run -
down valve, with the control grid returned to
switched positive potentials of approximately
38. .10 and 200 volts to give timing periods of
five, two or one second respectively. When the
function selector is not set to any one of the
three REP. positions, the run-down valve V10
is held at cut-off by the application of negative
potentials to the control and suppressor grids.
These potentials are derived from a voltage
divider (R58, R59, R63) connected across the
-300 volts and common rails. The monostable
V11 will be in its stable conditions, with V11A
conductive and V11B cut-off. The anode relay
RLE/2 will therefore be de- energised.
14. On setting the function selector to anyone
of the REP. positions, the appropriate positive
potential is applied to V10 control grid via
switch-bank SW3E, and at the same time the
suppressor grid is returned to the common rail
via relay contact RLE.1 and switch-bank SW3D.
Valve V10 will now pass anode current and the
linear run-down of anode potential will be
initiated and continue as capacitor C13 dis-
charges to raise V10 control grid potential.
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The talling potential at the anode of V10 is
applied to the grid of V11A so that at the end of
the run-down (COMPUTE) period VIIA is cut-
otf, and V11B regeneratively cut-on to cnergise
relay RLE/2. Thereon, contact RLE/2 will
change over to:-
(1) Energise via switch-bank SW3B
indicator lamp LP3 and relay RLA/2,
which switches all operational amplifiers
from the COMPUTE to RESET conditions.
Reter Fig.1.
15. Also following the operation of relay
RLE/2, contact RLE/1 will change over to:-
i i) Cut-off V10 by disconnecting the
gappressor grid from the common rail,
aid thus reinstating the negative bias
potential applied so that clectrode trom
the voltage divider R56, R59 and R63.
Capacitor C13 will now charge-up to reset
the stage for the next COMPUTE timing
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16. The charge on capacitor C16 will leak
away through resistor R71 until V11B_ grid
potential becomes sutticiently negative to cut-
off V11B and to cut-on V11A. Relay RLE/2
will then drop out to terminate the one second
RESET period, and contacts RLE/2 and RLE/'1
will change over to switch the instrument toa
further COMPUTE period and trigger the run-
down valve V10. Capacitor C14 and germanium
diode MR9 provide a positive pulse at the
commencement of each COMPUTE period for
the purpose of synchronising external equip-
ment. This trigger pulse is available at co-
axial socket SK6 at the rear of the cabinet.
Meter Circuit
(Reter Fig. 4)
17. The centre-zero meter is wired to a
double- pole 8- position selector SW4 so that it
can be switched to:-
(1) Monitor supply voltages
(2) Monitor amplifier outputs
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ON THE INSIDE OF CONSOLE RH SIDE
VIEWED FROM THE REAR.
Fig. 4 Circuit Diagram - 24V DC Relay Supply
(3) Monitor external voltages
(4) Facilitate setting of co-cflicient
potentiometers,
lu. Resistors R75, R76 and RLTS are multi-
pliers giving full-scale deflections for inputs of
*300 volts and #100 volts and’ +30 volts respec -
tively. When) monitoring amplifier output
voltages, the appropriate amplilier is switched
into the meter circuit by the OUTPUT SELEC-
TOR SW2, the METER switch being set to posi-
tion V. Since, in this condition, the multiplier
resistor is R76,. full-scale deflection will be
obtained with an input of 4100 volts.
easurement of External DC Voltages
19, The meter can also be used for the direct
measurement of external d.c. voltages not ex-
ceeding *100 volts. When used in this applica -
tion the METER selector SW4 is set to the "V"
position, and the amplifier OUTPUT SELEC-
TOR to OFF, The external voltage is applied
across the,violet coloured ''V" socket (line) and
any one of the signal ground ''SG" black coloured
sockets on the 36-way General Patch Panel.
The multiplier resistor is again R76, value
1 megohm, and the input is therefore limited to
t100 volts. External measurement of umpli-
ficr voltages may also be effected by plugging
ina digital voltmeter into the jack socket JK1
located on the control panel. When an external
digital voltmeter is used the panel meter
becomes ineffective in the NULL and V posi-
tions.
Setting of Coefficient Potentiometers
: The accurate setting of coefficient poten-
liometers is facilitated by using the meter as a
null-deflection indicator. For this purpose, the
METER selector SW4 is set to NULL, and the
amplifier OUTPUT SELECTOR SW2 to OFF.
The appropriate voltage is then set up on the
reference potentiometer RV3, and backed-off
by the armature voltage of the coefficient poten-
uiometer until the meter shows no deflection.
The initial adjustment is made with multiplier
resistor R77, value one megohm, in circuit, to
give a full-scale deflection of 7100 volts. Push-
buttons SW21 and SW22 introduce multiplier
resistors R78 and R79 to increase the sensi-
tivity of the meter to 10 volts and 1 volt full-
scale deflections respectively, thus ensuring
accurate final setting of the coefficient poten-
tiometer. Switch SW5 enables the high end of
the reference potentiometers to be connected to
the plus or ‘minus internal or external 100 volts
reference supply as required. Relay contacts
RLF/1 and RLF/2 automatically select the in-
ternal or external *100 volts reference supply
in accordance with the setting of the INT/EXT.
selector SW6 carried on the rear panel of the
cabinet. The armature of the coetlicient poten -
tiometer is connected to the meter input by
depression ef the appropriate key-switch, a
second bank of the switch at the same time con-
necting the +100 volts reference supply to the
high end of the potentiometer.
Measurement of External DC Voltages
by Null Method
21. The meter circuit can also be employed in
conjunction with the reference potentiometer
RV3 to accurately measure d.c. voltages within
the range 0 to 7100 volts by the null-deflection
method. When used in this application, the
METER selector SW4 is set to NULL and the
amplifier OUTPUT SELECTOR SW2 set to OFF.
The voltage to be measured is applied across
the violet coloured 'V" socket (live) and any one
of the signal ground "SG" black coloured sockets
on the 36-way General Patch Panel. The
reference supply of appropriate polarity is
switched to the high end of the reference poten-
tiometer which is then adjusted for null-deflec-
tionon the meter. The value of the input voltage
is nowread off the potentiometer dial. The push
buttons SW21 and SW22 are again used toin-
crease the sensitivity of the meter so that a
precise null-indication is readily obtainable.
Computer Switching
22. The forward path resistors and the resis-
tive and capacitive feedback elements associated
with each amplifier form part of the 25-way
Amplifier Patch Panel associated with that
amplifier. These feedback elements are
switched tor integration or summing by three
relays (RLA/1, RLB/2, RLC/2) and the SUM/
INT. selector, which components are repeated
on all ten 25-way Amplifier Patch Panels. The
Control Panel carries a function selector which
is virtually a master control Simultaneously
switching the forward path resistors and feed-
back elements associated with all ten patch .
panels to the required configuration. The func-
tion selector SW3 is a seven-way, five -bank
switch with functional settings designated POT.
SET, PROBLEM CHECK, COMPUTE and
HOLD. Three repetitive positions are provided
whereby the amplifiers can be automatically
switched for a one, two or five seconds COM-
PUTE period, each followed by a one second
RESET period. The switching sequence for
each function is described in paragraphs 23-27.
The Silicon Diodes MR18-23, connected between
the switching contacts and the 24 volts supply,
prevent reverse current appearing across the
contacts during switching.
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Potentiometer Set Condition
aos The function selector is turned to POT.
SET, and relay RLC/1 and indicator lamp LP2
(POT. SET) will be energised via contact RLB/1,
SW3A and SW3B. Relay RLA/2 will be cner-
vised via contact RLB/1 and SW3B.
Thereon: : :
(1) Contact RLA/1 will-change -over to
apply the 24 volts d.c. supply to the
PROBLEM CHECK (RESET) linc.
(2) Contact RLC/1 will change-over to
apply the 24 volts d.c. supply to the
HOLD OPERATE line.
Problem Check
Indicator lamp LP3 (PROBLEM CHECK)
wwill. be energised via contact RLB/1,SW3A and
““SW3B. Relay RLA/2 will be energised via con-
tact RLB/1 and SW3B.
(1) Contact RLA/1 will change-over to
apply the 24 volts d.c. supply to the
PROBLEM CHECK (RESET) line.
Compute ”
25. Indicator lamp LP4 (COMPUTE) will be
cnergised via contacts RLB/1, RLA/2 and
SW3C. No relays will be energised.
Hold
26. Relay RLB/2 and indicator lamp LPS
(HOLD) will be energised via SW3C.
(1) Contact RLB/1 will change-over to
apply the 24 volts d.c. supply to the
HOLD NORMAL line.
Repetitive Positions
27. During the one, two or five seconds timed
COMPUTE period, CONTACT RLE/2 will be
open; no relays or lines will be energised. The
COMPUTE indicator lamp LP4 will be lit via
contacts RLB/1. RLA/2 and SW3C. At the end
of the COMPUTE period, contact RLE/2 will
close to energise the PROBLEM CHECK indi-
cator lamp LP3 via SW3B and SW3A, and also
relay RLA/2 via SW3B and contact RLB/1.
(1) Contact RLA/1 will change over to
apply the 24 volts d.c. supply to the
PROBLEM CHECK (RESET) line.
On the termination of the one second RESET
period, contact RLE/2 will open to switch the
instrument to a further one, two or five second
COMPUTE period.
Overload Hold Facility
26. In the event of an amplifier overload be-
ing signalled by indicator lamp LPI (overload
circuit) the amplifier can be held in the over-
load condition by moving toggle-switch SW1
from the OFF position. The HOLD relay RLB/2
and indicator lamp LP5 will then be energised
via contact RLD/2, SW1 and SW3C when set to
COMPUTE or any of the three repetitive posi-
tions. Contact RLB/2 will now close to hold-in
relay RLB/2, and contact RLB/1 will close to
energise the HOLD NORMAL line to maintain
the amplifier in the overload condition. The
otftending amplifier can now be identified by in-
spection of the neon lamp overload indicators
carried on the panels of the individual ampli-
fiers. The EXTERNAL HOLD connections are
for use when two SCD 19 computers are coupled
and operated as a Single installation from one
of the Control Panels.
De
24 Volts DC Relay#Supply
(Refer Fig. 4)
29. The mains power for the 24 volts DC
Relay suppl¥ system is taken from the switched
side of the mains switch (SW7) and through a
mains tapping panel onto a transformer (T2)y
This transtormer has series connected primary
windings which may be adjusted for inputs of
110V or 220V +45, 10 or 20V by the mains
selector panel MSP2, The secondary windings
consist of 3 windings connected in series to give
approximately 20 volts output. This output is
fed to a bridge-connected rectifier network
consisting of silicon diodes MR12, MR13, MR16
and MR17 to produce a d.c. output at 24 volts.
Resistors R73, R75 and capacitor C17 forma
ripple filter, whilst bleed resistors R80, R81
are included to improve the regulation of the
supply.
30. The INT./EXT. switch SW6, mounted on
the rear panel of the cabinet, is for use when
two SCD 10 computers are coupled for opera-
tion aS a Single installation from one of the
Control Panels. In these circumstances, a
common 24 volts supply and +100 volts
reference supply should be used. The INT./
EXT. switch disconnects the computer function
switching relays from the internal 24 volts d.c.
supply and connects them instead to the external
24 volts supply provided by the other SCD 10
computer. At the same time, relay RLF/2 is
energised and contacts RLF/1 and RLF/2
change-over to connect the external +100 volts
reference supply to the reference and coeffi-
cient potentiometer circuits.
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31. The diode function generator selector — ly, whilst the potentiometers are designated by
switch (SW10) mounted on the rear panel, is for the numerals 1-4. Associated with each free
use only when diode function generators are potentiometer is a Single-pole change-over
fitted, The switch has three positions de- switch which, when depressed connects the
signated 0, 1 and 2, and should be set at the armature of the appropriate potentiometer to
ZERO position if diode function generators are the voltmeter input circuit.
not required for operation in the computer.
Reterence to appendix B in the manual will
tive the functions of the selector switch in the Earthed Potentiometers
alternative positions (1 & 2) and the relevant
computer function. 34. One extremity of all twenty of. these
potentiometers is permanently wired to earth.
The high extremities and armatures are
Potentiometer Panel internally connected to the ten 25-way Ampli-
fier Patch Panels; two potentiometers being
32. The panel carries four earth-free and connected to each panel. The sockets are
‘yenty earthed, wire-wound, ten-turn, helical coloured orange, and are identified by the
yntiometers each having a value of 30,000 designations H1, Al, H2 and A2. Associated
-fms. with each of the earthed potentiometers, is a -
es double - pole change-over switch which, when !
Free Potentiometers . depressed:
33. The armatures, high and low extremities (1) Connects the highend of the selected
of the four earth-free potentiometers are potentiometer to the +100 volts
internally wired to the 12 orange coloured reference potential, at the same
sockets on the General Patch Panel. The time disconnecting it from the patch
sockets connected to the armature, high and panel socket.
low extremities of the potentiometers are identi- .
lied by the designations A. H. and L respective - (2) Connects the armature of the
' ? 3 ' , > s
NOTE: The 25-way amplifier patch panels Ai and BI illustrated
are. in each case. repeated identically five times on the
computer patching desk viz. A2.... AS, and B2.... BS,
F therefore. only one of each is illustrated.
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AMPLIFIER PATCH PANEL
Fig.5 Amplifier Patch Panel Functions
‘1
selected potentiometer to the volt-
meter input circuit.
35. The voltmeter input line is routed serially
through all the 24 key switches as a potentio-
meter protective measure. The order of
connection is given in Fig.9. It follows there -
fore, that if any key switch is inadvertently left
in the "down" position, it will not be possible to
meter the armature voltage of any of the suc-
ceeding potentiometers.
PATCH PANEL
(Refer. Fig. 5)
ene ral
6.The Patch Panel consists of:
(1) Ten (one per amplifier) similar
25-way Amplifier Patch Panels,
each wired with forward path resis -
tors and feedback elements, and
fitted with a SUM/INTegrate selec -
tor and three relays for switching
these elements.
(2) One 36-way General Patch Panel
wired to the earth-free potentio-
meters, diode pairs, signal ground,
voltmeter input line, recording out-
puts, andvarious multiway termina-
tions for external control functions.
(3) One 36-way patch panel, used only
on computers fitted with servo
multiplier units.
(4) One six-way and one eight-way
auxiliary patching panel located
immediately above the main body
of the Patch Panel but in the same
plane as the Control Panel.
The functions of all sockets having specific uses
are designated by engraved legends, and addi-
tionally, some sockets are identified by acolour
coding system thus: -
Summing junctions - green
Amplifier inputs - blue
Amplifier outputs - yellow
Potentiometer connections - orange
Signal Earth - black.
AMPLIFIER PATCH PANEL
(Refer Fig. 5)
General
37. Each Amplifier Patch Panel carries
25 sockets and one SUM/INT. selector. The
functions and colour coding of these sockets are
listed in Table 1.
The Patch Panel Circuit Diagram shows only
the Amplifier Patch Panel Al, which is asso-
ciated with the similarly designated (Al) ampli-
fier. It should be borne in mind that there are
in factnine further such patch panels, which,for
reasons of space limitation and simplicity are
not shown on the circuit diagram. These nine
panels are physically identical with panel Al,
and differ only in respect of amplifier and co-
efficient potentiometer connections.
Input Circuit
38. Four input resistors are provided, two
(Ra, Rb) having a value of 1 megohm, and two
(Rc, Rd) having a value of 100,000 ohms. These
forward path components, in conjunction with
the feedback resistor Rh (value one megohm)
give gains of unity and ten respectively. ‘° Any
number of these input resistors can be con-
nected in parallel to obtain any integral gain
from 1 to 22. Equally, up to four inputs may
be summed, the gain to each being dependent
on the value of the appropriate input resistor.
To compensate for the inherent capacitance
between the summing junction and the amplifier
output, capacitors Ca - C4 are wired in parallel
with the input resistors. Thé remote ends of
all four resistors are commoned and relay
switched to the summing junction or to signal
earth according to the computing function which
the amplifier is required to perform.
Feedback Elements
39. Two feedback elements are provided, a
capacitor Ce for integrating, anda resistor Rh
for summing. Capacitor Cf is provided to
maintain overall stability of the amplifier. On
‘A' amplifiers capacitor C3 has a value of one
microfarad, whilst on 'B' amplifiers it has a
value of 0.1 microfarad. The value of resistor
Rh is one megohm on both 'A' and ‘B' ampli-
fiers. These feedback elements are selected by
the contacts of relay RLC/2, which in turn is
controlled by the SUM/INT. switch SWA.
40. Bearing in mind that when the installation
is switched to COMPUTE at the Control Panel,
lines 1, 2 and 3 are not energised, on setting
switch SWA to SUM, relay RLC/2 will operate.
Contacts RLC/1 and RLGC/2 will thereon change -
es
10
we
Socket
Designation
SJ
SJ1
SJ2
10
10
OP
OPI
+100V
-100V
H1
Al
H2
A2
IC
IC
EC
TABLE 1
AMPLIFIER PATCH PANEL SOCKET FUNCTIONS
Colour
Green
Green
Green
Blue
Blue
Blue
Blue
Yellow )
Yellow )
Yellow )
Yellow )
Yellow
Red
Purple
Orange
Orange
Orange
Orange
Red )
Red )
White
White )
White )
White )
White )
Function
Amplifier input
Junction Internal
summing resistors
Amplifier input end of
internal feedback element
Unity gain input
Unity gain input
Ten gain input
Ten gain input
Four internally linked
amplifier output
terminals
Output end of internal
feedback element
+100V reference voltage
-100V reference voltage
High end potentiometer 1
Armature potentiometer 1
High end potentiometer 2
Armature potentiometer 2
Input for initial
condition voltage
(interfally linked)
External connector
Four internally connected
spare multiple links
ee see
over to connect feedback resistor Rh between
sockets OP1 and SJ2. Insertion of shorting
links between socket SJ - SJ2, and OP - OP1,
will effectively connect the fecdbuck resistor
Rh across the summing junction and output of
the associated amplifier... The tecdback capaci -
tor Ce will be earthed via coftuct RLC/1 and
resistor Rg.
41. When switch SWA is set to INT., relay
RLC/2 will drop-out, and feedback capacitor
Ce will be connected between sockets OPI] and
SJ2. Insertion of shorting links between sockets
SJ - SJ2, and OP - OP1 will connect the leed-
back capacitor across the summing junction and
the output of the associated amplifier. The
feedback resistor Rh will now be earthed via
mtact RLC/2. The integrating circuit now
ined is in all but one respect identical to
at shown in Fig.12 Chapter 2 for the sum-
ming circuit, the exception being that the feed-
back resistor is now replaced by the feedback
capacitor.
Initial Condition Setting Resistors
42. Two resistors Re, Rt are provided to per-
mit settingup the initial conditions prior to an
integration. Electrically this entails charging
up the feedback capacitor Ce to a precise
voltage as required by the problem to be solved.
When Setting up the initial condition the installa -
tion is switched at the Control Panel to POT.
SET., and patch panel relay control lines 1 and
3 will be energised. Therefore with the patch
panel switch SWA set to INT. , the status of the
relays will be:-
RLA/1 de-energised
RLB/2 energised
RLC/2 de-cnergised.
In these circumstances: -
(1) The input resistors Ra - Rd will be
earthed via contact RLB/1.
(2) The junction of resistors Re and hf
will be connected to the summing
junction via contacts RLB/2 and
RLA/1.
(3) The feedback capacitor Ce will be
connected across OPI and SJ2 via
contact RLC/1.
On patching the 7100 volts reference supply
according to the polarity of charge required to
the high end (H1) of the potentiome tex and patch -
ing the armature (Al) to a 1C socket,the circuit
is obtained. In practice the, initial condition
voltage is firstly set up on the Control Panel
reference potentiometer RV3, and backed off by
the amplifier output voltage for zero deflection
of the built- in voltmeter.
Problem Check Switching
43. With the Control Panel function selector
set to PROBLEM CHECK, patch panel relay
control line 3 will be energised. On amplifiers
switched by SWA to INT., relay RLB/2 will be
energised, and relays RLA/1 and RLC/2 de-
energised. This is the POT. SET conditions
as described in paragraph 42. The initial condi -
tions can now be checked as direct voltmeter
readings by scanning the outputs of the inte -
grating amplifiers using the amplifier OUTPUT
SELECTOR SW2. If desired, the coefficient
potentiometer setting-up procedure can be
repeated as a further check.
44. Onamplifiers switched by SWA to SUM,
only relay RLC/2 will be energised, bringing
these amplifiers to the COMPUTE condition.
The summing amplifier output voltages can now
be checked on the built-in meter using the
amplifier OUTPUT SELECTOR SW2.
Hold Switching
45. With the Control Panel function selector
set to HOLD, patch panel relay control kine 2
will be energised. Relay RLA/1 will be
operated via switch SWA to the INT. position.
In this condition the summing junctions of the
input resistors will be earthed via contacts
RLB/1 and RLA/1, thus leaving the feedback
capacitor Ce charged to the voltage across it at
the time computing was arrested. The solution
at this instant can now be recorded by a suitable
device.
Since as a result of grid and leakage currents
at the amplifier input, the arrested voltage on
the capacitor cannot persist indefinitely, the
accuracy of any solution obtained will be reduced
as the time lag between the instants of arrest
and solution is increased.
Amplifier Overload Hold
46. Operation of the OVERLOAD HOLD switch
SW1 on the Control Panel will also apply the
24 volts d.c. potential to patch panel relay con-
trol line 2. -Relay RLA/1 will then operate to
earth the Summing junctions of all integrating
amplifers and hold them, and any affected
summing amplifiers, in the overload condition.
The neon overload indicator lamps on the in-
dividualamplifiers can now be inspected and the
olfending unit or units located.
External Connection
47. The white EC socket is connected to the
24-way socket SK13 carried on the rear panel
of the SCD10, to permit the connection of ancil-
li
. SK/TP.1575
TJ 1231.2
POT ASSY
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A B Cc D i st 6S
NOT
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NOT RECOMMENDED FOR j
USE IN SCD 10 ,
TJ 1231.2 TJ 1231.2
POT ASSY POT ASSY
123123 123125
A B CD AB CD
DH | DATDEIN.C {I DH|DS |DL |DC |1
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THE FIRST LETTER REFERS TO THE POTENTIOMETER AND THE SECOND
TO HIGH, ARM, LOW, SINE & COSINE.
N.C.- NO CONNECTION.
Fig. 6 Servo Multiplier and Resolver Connections
12 ° TY 115
lary apparatus to the amplifier associated with
that patch panel, the four internally connected
white sockets at the top of the patch panel are
for use aS a Spare multiple link.
GENERAL PATCH PANEL
(Refer. Fig. 5)
General
48. The General Patch Panel carries 36
sockets, the functions and colour coding of
which are listed in Table 2.
arth Free Potentiometer Sockets
fy qfhe armature (A), high (H) and low (L)
mds of the four earth-free potentiometers are
vired to the 12 orange coloured patch sockets.
Diode Sockets
50. Four pairs of diodes, each pair having one
anode to cathode connection, are wired to the A
(anode), J (junction) and K (cathode) rows of
sockets. These diodes are for use in conjunc-
tion with the four earth-free potentiometers for
the generation of discontinuous functions.
Voltmeter Line
51. The violet coloured '"'V" socket enables
external d.c. voltages not exceeding +100 volts
to be measured on the internal voltmeter.
Meter paragraph 21.
~ Woutlets to Recording Device
52. Four white sockets designated R1, R2, R3
and R4 are wired to four correspondingly desig -
nated coaxial