Datasheet

Specifications for General Purpose Desk-Top Analog Computer (TR-10)

A formal procurement/design specification document (document number GPAC-TR-10 PS 6305) issued by Electronic Associates, Inc. for the TR-10 general-purpose desk-top analog computer. It defines detailed performance and construction requirements for all computing components: up to 20 uncommitted operational amplifiers (+-20 uV offset, 50 uV/s drift limit, 200 kHz bandwidth), up to 24 ten-turn potentiometers (0.025% resolution), up to 9 quarter-square multipliers (+-0.4% static error), X2 diode function generators, comparator, function switches, reference supplies, power supply, and a full patching element suite including a high-speed repetitive operation system cycling up to 33 solutions per second. The complete expanded system is constrained to no more than 100 lb and 16 in W x 23 in H x 16 in D.

Manufacturer: EAI
System: TR-10
Type: Datasheet
Language: English
Learning track: machine reference
Pages: 7
Credit: Document number GPAC-TR-10 PS 6305; published by Electronic Associates, Inc., Long Branch, N.J.

TR-10
EAI
specifications
operational amplifiers
multipliers
patching

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E AI o E A I . E T E C T R OI C N- A S S O C I A T E GSM B I { 5I AACHEiI M A R T I N S T R A SI S 1E ELECTRONIC ASSOCIATES, INC., LongBranch,N.l. SPECIFICATIONS FOR GENERATPURPOSEDESK.TOP A}IAI.oG COMPUTER 1. 2. GENERALDESCRIPTTON 1.1 Reliability, accuracy and operating convenience shaL1 be pararnount considerations in the design of the equiprnent comprising the cofitputer as outlined herein. The conrputer is to be courpleteLy transistorized to insure the best reliability, stability and extreme compacLness. So that it shalL be suitable for desk-top use, the computer when fulJ-y expanded shall weigh no more than one hundred (L00) pounds and shaLl be no greater in size tha; L6" I,I x 23" H x 16" D. 1.2 One each computer, L.3 (Up to Lwenty) operational 1.4 (Up to twenty-four) L.5 (Up to nine) 1.6 (Up to eighteen) L.7 one comparator 1.8 (Up to two) function t.g One each reference I.10 One each power suppLy, in accordance with 1.11 Patching 2.2 unipolar (if 2. in accordance with potentioneters in accordance with required) Section 5. in accordance with switches, suppLy, in accordance with the foLLowing 6. 7. Section 8. Section Section Section Section section in accordance with el-ements, in accordance with Section 3. in accordance wiLh Section 4. X2 oFG, in aceordance with 9. L0. 1L. features: The conputer shaLL be pre-wired to aceo,strnodateup to twenty operationaL amplifiers and twenty-four precision potentiocneters. It shaLL aLso be prewired to accept interchangeabLy the foLlowing additionaL computing components: Z.L.L (Up to eighteen) 2.L.2 (Up to nine) quarter-square 2.L.3 (Up to nine) X2 diode function 2.1.4 (Up to nine) variabLe 2.L.5 (Up to nine) Log or one-half integrator networks IN UAA generarors. diode function Computer shaL1 also be pre-wired two function switches. (Nine Dual Networks) muLtipLiers. generators. tog X diode function generators. to accormnodate (up to one) conparator - 1 PRIN?EO Section amplifiers, precision muLtipliers COMPIITER- To contain 2.L in accordance with and 2.3 4 L L computing components shaLL pl-ug into the front of the computer to a1low repLacement and servicing. for quick and easy interchangeabiLiLy, 2.4 ControL Panel 2 . 4 . L Mode SeLection. The fo11-owing computer mode controLs abl-e at the computer controL panel. 2.4.2 2.5 T h i s mode shalL restore shaLL be avail- probLem to initial- 2.4.L.1 Reset. 2.4.L.2 H o L d . T h i s mode shaLl hold probl-ern solution. 2.4.L.3 Operate. conditions. This mode shalL pLace computer in operate condition. Readout 2.4.2.L A current sensiLive meter shaLL be provided which may be used as a nuLL meter with .L% aceuracy and as a vol-tmeter with 2% When used as a voLtmeter, ir shall have the accuracy. foLlowing meLer ranges: 130 vol-ts, *l-0 volts, t3 voLts, tl volL, t0.3 vo1ts, t0.L voLt. 2.4.2.2 A voltmeter jack shaLl be provided for use as an input Lo the voltmeter r,rhen being used as a nulL meter or volLmeter. 2.4.2.3 It shaLL be possible through the use of no more than one patch cord to read any output voLtage in the compuLer on the voLtmeter and to nul-l- it against the nuLL poL. 2.4.2.4 It shal-L be possibLe to sel-ect and readout on the voLtmeter the output of each operationaL ampl-ifier (1 thru 20), p1-us (*) reference voLtage, and minus(-) reference voLtage without patching. 2.4.2.5 An ampLifier output jack shaL1 be provided so that amplifier outpuLs, selected without patching, are avaiLable at aLL times for metering, recording, etc. - It shaLL be possibl-e to accurately r^rithin the system without patching. 2.4.3 Coe$ficient PoLentiometer Setting potentiorneter set any coefficient 2.4.4 AmpLifier BaLance - It shall be possible to select Lhe stabiLLzer output of each operat.ional- ampLifier and moniLor it on the meter (2.4.2.L) to aLLow accurate balancing without patching. 2.4.5 Power On-Off Switch - The control panel shal1 contain turn on and off primary power to the computer. A visuaL overLoad atarm shalL be provided which shal-L indicate is overl-oaded. operationaL amplifier - 2 - a switch to r,rhenever an 3. 4. 2.6 All power supply voLtages are to be suppLied by bus bars. It shaL1 be possibLe to remove any porrrer supply voLtage from any component by merely unpLugging the proper taper pin from a bus bar carrying that vo1-tage behind the component. 2.7 4LL operational 2.8 The computer patching components and por4rersuppLies are to be of a plug-in type. area shaLL be coLor-coded as foLLows: 2.8.1 Green - Input 2.8.2 Red - Output 2.8.3 YelLow - Potentiometer 2.8.4 Black - Ground AMPTIFIERS 3.L Alt operational ampLifiers shaLl be unconunitted. That is, of being used as either integrators, suntrners, or high-gain pending upon the patching utiLized. 3.2 Each ampLifier shaLL have an overLoad indicatot tied to a central overLoad aLarm which wiLL indicate any excessive departure of the sunrning point voLtage from the zeto. 3.3 OuLput current 3.4 Bandwidth shaLL be 200 KC minimum. 3.5 Phase shift of a standard inverter at twenty vol-ts peak-to-peak thousand cycles per second sha11 be no more than 0.1o. 3.6 After balancing by the nor:nal procedure the offset voLtage measured at the ampLifier sunrning junction shaLL be no more than twenty microvoLts maximum. 3.7 Drift of a gain one integrator maximum. 3.8 Integrating 3.9 The dynamic ampLitude error of a standard inverter at ten voLts peak-topeak at 11000 cycl-es per second ehaLL be no greater than .06% typicaL and .1% maximum. shalL be capabLe ampLifiers, de- shaLl be twenty miLliamps at pLus-minus ten voLts. capacitors shaLl not exceed 50 microvoLts shalL be accurate to within and one- per second pLus minus .L%. POTEtirlIOMETERS 4.1 Shall be LO-turn 5000 OHM (carbon) 4.2 ShaLl have push-button without patching. 4.3 ResoLution shall switching potentiometers to al1ow rapid be (.025%) typical. - 3 - with setting adjusting knobs. of coefficients 5. 4.4 Approximately 4.5 ALL inputs two potentiometers one out of every shaLl be ungrounded. shal-l be unconunitted. MULTIPLIERS 5.1 ALL muLtipl-iers shalL be of the quarter-square 5.2 The maximum static rnultiplying (20 voLts fuL1 scale). 5.3 Phase shift shalL be Less than 0.280 r,rhenmulripLying 20 voLts peak-to-peak at 1000 CPS. 5.4 The maximum dynamic ampliLude error r,rhen muLtiplying 110 voLts D-C by 20 volts peak-to-peak at 1000 CPS shaLL be !p.25% of fulL scal_e. 5.5 The unit 5.6 ALL necessary terminations shaLL be brought to the patch paneL to enabLe the operator to use these units for performing muLtiplication and division. shaLL be completely error type. shaLl not exceed fi.+Z of ful-L scaLe tLO voLLs D-c by soLid state. 6. x2 orc 6.L ShaLl be a completei-y soLid state 6.2 I,Ihen properly intercormected with one or more operationaL be capable of performing the EoLlowing operations: fixed diode function generator. amplifiers 6.2.L Yield sign. 6.2.2 Yield the square root minus in sign. 6.2.3 Yield outputs of (Xf)2 and (Xr)Z with unipoLer and of opposite sign. 6.2.4 YieLd outPuts of the sguare root of X1 and sguare root both inputs X1 and X2 unipoLar and of opposite sign. anXz output with the input of X with X varying the input voLh plus and minus in X varying inputs sha1lO ! it both pLus and X1 and X2 wtrich are of X2 with 6.3 Phase shift and dynamic error Lined in Section 5 above. 6.4 Tlere shall X' ftrnction. 6.5 The rnaximum static error shaLL be no greater than pLus minus O.4% of fuLL scaLe. The typical static error shaLL be no greater than pLus minus 0.2% of fu1l scaLe. be at shaLl be equivaLent to the multipLier as out- Least seven segments per quadrant used to approximate - 4 - the 7. 8. 9. COMPARATOR inpuL voltage to an arbitrary to be performed. fixed 7.L The comparator shall conpare a variabl-e voltage and cause a switching operation 7.2 The cornparator shaLL contain 7.3 A differential 7.4 Each comparator sha1l have an input 7.5 Switching 7.6 (minimum change in input voltage required to cause switching Sensitivity shalL be no greater than three miLLivoLts. action in either direction) 7.7 The reLay contacts shaLL be capabLe of handLing aL least Loads. 30 voLts for non-inductive ampLifier at Least one doubLe poLe, double throw reLay. as a part shaLL be furnished time shaLl be no greater of the comparator. range of pLus minus L0 volts. than 10 milliseconds maximum. two amperes at FT]NCTIONSWITCIIES 8.L Shal1 be singLe poLe, doubLe throw, switching operations. 8.2 Switch contacts shall- be capabLe of handLing at Loads. for resistive center off, for performing switches manuaL Least one €lmpere at L20 voLts REFERSNCE g.L Accurate t10 voLt reference furnished 9.2 On the patch paneL there shalL be at Least three paraLLel- terminations (*) reference and three for negative (-) reference. positive suppLies of 50 milllamperes . capacity sha11 be for l 1-0. POI^IERS$SPLY 10.L pohrer supply shaLL be furnished which is capable of operating A Lransistorized the fronr L00 to L25 volLs, 50 to 60 cycLes per second without affecting accuracy of the compuLing components. L0.2 capacity to supply the necessary This suppLy sha1L have sufficient the cornputer r,rhen it is completeLy expanded. Por^rerto LL. PATC'IrINGELm{ElfIg ll.L Feedback ResisLors (QuanLity Required) 11.L.L They sha11 be L00K OHMS+.1% wire-wound resistors. 1L.L.2 Each resistor shaLl be supplied in a moLded plug designed for patching of any operationaland output terminations betr^reen the sunrning junction amplifier. 11.L.3 It shalL be possibLe to paraLLe1 feedback resistors plug on top of another plug. - ) - by plugging one LL.2 11.3 Input Resistors (QuanLity Required) LL.2.L Input resistors sha1l be 10K OHMSor 100K OHMS+ .L% epoxy-incapsulated, wire-wound resistors. LL.2.2 Each resistor sha1l have a male end to plug into any jack on the eomputer and a female end to accept a patch cord or another input resistor. Diodes (Quantity Required) 1 l _ . 3 . 1 Each Unit shaLL be a sil-icon diode incapsulated manner as the input 11.4 LL.3.2 Maximum inverse voltage 1 1 . 3. 3 Maximum inverse current shall be at least .025 micro€rmperes at 10 volts. Minimum forward currenL shal1 be at l-east 3 milliamps at l- volt. Multiples IL.4.1 11.5 shall be at Least 25 volts. (Quantity Required) Each multiple to provide a six-ho1-e, off the patch panel tie point for interconnecting patch cords or increasing the output holes of various computing components. Patch Cords (Quantity Required) 11's't LL.6 in the same resistors. Siul'.i*ü:l:ä il";l;;:: ""u or variouslengthswiLhboth 11.5.2 They shal-l be color coded as to their 11.5.3 Their plugs sha1l fit Iligh Speed Repetitive length. aL1 jacks used. in the computer. Operation System 11.6.1 Shall permit computer to be operated in either high speed repetitive operation. LL.6.2 Shall be capable of producing compute times from 20 to 500 milliseconds per so1-ution. Reset time sha1l be ten milliseconds. The IISROshal1 be capabl-e of cycling solutions dt least 33 times a second. 1 L. 6 . 3 Shall have switch control of solution times at fixed values of 2O, 50, 100, and 200 mil-liseconds per solution. Vernier control- to obtain sol-ution t.imes between fixed values shaLl also be available. 1 1 .6 . 4 Timing unit shaLl be completely - 6 - solid state. real time or LL.7 1 1. 6 . 5 Shal1 have trsl-avetr system to a1low control of two or more computers operation mode. in either real time or repetitive rL.6 .6 Shall have automatic time scale change of 500 to 1 from real time to repetitive operation which may be accomplished slmultaneousLy frorn mode control buttons on controL panel. on all integrators tt.6.7 Shall utilize high speed electro-mechanical puter between reset and operate modes. relays to cycle com- Pre-Patch ?aneL LL.7 .l- Construction The computing console shall accept a removable pre-pateh pane1. All computing components shall terminate inputs and outputs on this pre-patch panel. ConstrucLion sha11 be such as to eliminate possibility of ttopentt connections due to loose or partial insertion of patch cords. The pre-patch panel- shal1 be constructed so that it can be modified to conform to changes in the nurnber and type of computing components in the computing consol-e. This shal-l- be accompl-ished by adding or repl-acing component blocks on the prepatch panel as required by the new computer component configuraLion without any changes or additions to systems wiring. The pre-patch panel shall be aL least 16-25/64 in width arrd 12-23133 in height in order to allow the progrartrner proper access to, and vision of, the pre-patch panel connections. LL.7.2 Color-coding of pre-patch panel--To be color-coded as follows L L . 7 . 2 . L Green--input L L . 7 . 2 . 2 Red--output L L . 7. 2 . 3 Ye 1low- -po tentiometer L L . 7. 2 . 4 Black--ground L L . 7. 2 . 5 lthite - -integrator L L . 7 . 2 . 6 Tan--switching ne tworks and non-linear components - 7 GPAC -TR-I.O PS 6305