Analog Computers

Manual / Guide

Minispace Analogue Computer Operational Manual

Read the PDF (30 pp) ↗

Operational manual for the Solartron Minispace analogue computer, published by The Solartron Electronic Group Ltd, Thames Ditton, Surrey, England. Covers basic analogue computing techniques, machine setup and programming, patching, coefficient potentiometers, and computer functions including integrators and differentiators. Appendices provide specifications of the DC Amplifier AME1.8 and notes on computer limitations; applications addressed include solving single and coupled differential equations, servo-mechanism simulation, and weapons control system modelling.

Manufacturer
Solartron
System
Minispace
Type
Manual / Guide
Language
English
Learning track
machine reference
Pages
30
  • Minispace
  • Solartron
  • analog computer
  • operational manual
  • DC amplifier
  • differential equations

← Back to the Reference Library

Minispace Analogue Computer Operational Manual

ire tee ris bat —_ es eon TRO Seeedhinnd vastiteienetie’ Se ae ers + F i eens She ae bes See yee ee ‘eS ar i -44 pre a . sa Se moe. woeesteae-ty es ee Seid poe m4 eye re = terete ose Sara ~ a ay 4 ee ato rest Bo Sie der ~ oe. a SOLARTRON THE MINISPACE ANALOGUE COMPUTER OPERATING MANUAL FOREWORD The Minispace analogue computer is a small general purpose machine suitable as a design tool or as an educational aid. It comprises ten drift-corrected D.C. amplifiers, each of which may be used for summing, sign reversing, or integrating, twenty-four potentiometers, a patching panel, computer control facilities and built-in power supplies. Simple non-linear elements are included, and servo-multipliers are readily incorporated to expand the scope of the computer. Two Minispace machines may be used in conjunction with one another, with one control unit operating both machines, The following problems are typical of those which may be solved on a single Minispace. (a) (b) (c) (d) (e) tee = Telephone : EMBerbrook 5522 Single differential equations of up to fifth order. Two simultaneous differential equations, up to third order. Multiple loop servo-systems. Aerodynamics simulation for guided weapon control systems. Dynamical mechanical systems, offorinstance, the mass, spring, viscous damping type. THE SOLARTRON ELECTRONIC GROUP LTD THAMES DITTON + SURREY - ENGLAND Telegrams and Cables : Solartron, Thames Ditton = Sas a a I na he) — = Pe 15° eT Se \ Su2> = 1 LIST OF CONTENTS | ' Chapter 1. Basic Analogue Computing Techniques 1.1 Introduction bees eee cose oeee isieie awe isa | 1.2 Basic Mathematical Operations wee eee see sees sees sees 5 P 1.3 Setting up a Problem and Programming the Computer re cece woe «|«CS ' ls A Simulating simple discontinuities .... oe sees sees sees aaee 4212 Chapter 2. Operating Minispace a ( General description of Minispace .... eee" sel Sevets newis aero 14 2.2 Setting up Procedure Kiarexe over Siew oe . sees eo. 1S a ny 2.3 Patching Minispace — . . _ cee eee wees 16 : 2.4 Computer Functions ve ean _ er ; er sy 20 - Appendices | Appendix 1 Specification of DC Amplifier AA621. 2 avatars wisiete orers ater sie 120 Appendix 2 \ The differentiating Circuit sievers avatere areas i ae ewe 123 | Appendix 3 Computer limitations seer stetate neers aaa arate ave save 124 | LIST OF DIAGRAMS - ? 4 The DC Amplifier with generalised forward path and feedback impedances wie 5 2 An Integrator awiats ae saree ee sere ar wae 7 Fig. 3 Circuit for simplelag .... .20. wie | (RRS - aaa «(OY on ¢ Fig. 4 Coefficient .Potentiometer .... wraxere oxerage e100 s «xe ou. 8 Fig. 5 Coefficient Potentiometer in the feedback Path ens aiatals acais scos |C8 | vil Fig. 6 Computer flow diagram for second order differential equation ne aaide 4 9 , | T Fig. 7 Computer schematic diagram for second order differential equation ara cae 9 . Fig. 8 Scaled computer diagram for y = kx sietate 526% stators BOO re | | a Fig. 9 Circuit for inert zone Ae Scis% ais sina BATE Or ima «12 \ i Fig. 10 Limiter circuit ee Ta re | ae ' Fig. 11 Two segment curve re CSE Sas as rt are wae. 12 ' nt Fig. 12 Backlash simulation sees ee “0030 axevere eietase areiasal be ciety 30 Ps: LIST OF DIAGRAMS (continued) Fig. 1§ Summing circuit wievers wteiers sie Fig. 14 Simple lag Pots sieieis APC are Sieiet re 34% AS Fig. 15 Multiplying and dividing by a constant ssevex svanars sews 19 Fig. 16 Circuit for setting coefficient Potentiometer ce eee cece coos 21 Fig. 17 Setting initial cOnditions .. . see execace aseKene wcoxere ad Fig. 18 The differentiating circuit .... sreteNs coos coe seis cece sea 823 Fig. 19 Generalised computer amplifier in open loop conditions wee sees weee 24 Fig. 20 Minispace Patch Panel eavers ae werere erates sees .... inside rear cover Fig. 21 Coefficient setting potentiometers .... eueieus wesexe erasexe aan eoee inside rear cover Fi, 22xternal control & record sockets .... sees see eee eose «++. inside rear cover LIST OF PHOTOGRAPHS Frontispiece Minispace : ores PC seee sisi eee oe 4 Plate 1 Control and potentiometer Panel .... arora sess e:evexe prevee AS Plate 2 The Patch Panel arate areas atta eeee cove swe «16 a ‘ sad Beatin stare ; A pr ee Ey SRE ne etal —— —— - en ee ee ees ' Fs wh gte ce a oe : ee et Cre re Creve ere ve OF O° Cr xf ¥ Minispace == ims rO re rere rer *+O-+O- er eo v ov — a n 4 8 ty rt CHAPTER 1 BASIC ANALOGUE COMPUTING TECHNIQUES pe | Introduction The equations which describe many real physical systems are not amenable to classical methods of analysis due to inherent non-linearities. Others may be difficult and tedious to solve because of general complexity, or because solutions of the same equation are required with many values of the physical constant. This is particularly so, for example, in problems of system optimisation, where insufficient initial information exists to enable those constants to be chosen directly. .In such cases it is desirable to set up a model (an analogue) of the system to be studied, provided this can be done with reasonable facility. This is precisely the function of the analogue computer, : The electronic analogue computer is in fact, a model in which the physical variables are ‘fepresented as voltage variations, mathematical operations on these variables being performed Using direct coupled, high gain feedback amplifiers, whilst the coefficients (physical constants) multiplying the variables are set up on continuously variable attenuators (potentiometers). Generally, the most suitable applications for electronic analogue computers are those in which the independent variable is time, both transient and steady state solutions being readily obtainable from the analogue. ; 1.2 Basic Mathematical Operations (1) The D.C. amplifier with generalised forward path and feedback impedances. FORWARD PATH IMPEDANCES )¢ ERROR FEEDBACK VOLTAGE a or | Z, a . e & ouTPUT Z¢ VOLTAGE os y+ 23 / DC AMPLIFIER OF 1 | | i ! Fig. 1, The D.C. amplifier with generalised forward path and feedback impedances. - _ INPUT VOLTAGE 3 = 8 p The amplifier input impedance is high so the current into the amplifier is assumed zero. Summing currents at thé input node Vv Vn - Eg + Vp. - E,=0 I 1 - Eg + Vo - By t cocscccves i ee ———— Then V1+Vo V2+Vo Vn+Vo Vo+Vo o< + O< t+ ececes oo + ~ =0 2 42 Zn Zy or re-writing V1. + V2'+ cecccces Vn = - Vo ( 1 +1 +1 +1 +1 ) % 7 Tr ( Bg Ay Wy OZ, oy) Ife<is very large, the terms multiplied =— the Vy bracket may be neglected, and then, ~_ (Pgh Agee 3) Depending on the value of@éthe number of inputs is limited, since the effective amplifier loop gain and the accuracy of the computation is decreased as the value of the forward path impedances paralleled is decreased, Note: Vo, Vy, Vg, ete. are of similar orders of magnitude; from equation II above, since o¢isvery large Ey, is always vanishingly small, Thus the summing node is termed a virtual ea (2) Sign Reversal Referring to Fig, 1, make Zy and Z¢ equal resistors R and remove all other forward impedances, then ‘ Ye Vo= -1 ‘i If an alteration in scale is desired the two resistors may différ i.e. Vo= -R _. jana 7. OM > (3) Summing Referring to Fig. 1, make all impedances pure resistors. Zt = Ry \ Zy = Rj i . an : Z2 = Rg : 4 : Zn . Ry R 2 Rn All inputs are added in proportions depending on the respective forward path resistors. (4) Integrating 4 In this case the feedback impedance is capacitive. Zy= 1 (pis the differential operator) : ea ) Z,=R 0 —— = == ¥ Z2, Zg etc. are removed. , ThenVo=-_1_ ‘The "transfer function" representing an integration, with respect to Vi; ‘Rp time. Multiple inputs can be summed and integrated in the same amplifier if Zq = Ro, Z3 = Rg, etc. Alternatively: - *——IF- Fig. 2. An Integrator f Referring to Fig. 2. Assume Eg =6 then,” . iy = Vy and ip =Cg Vo , f ‘ R dt : i but, iy + ig = 0 R dt | . t i Integrating Vo =_1_ Vy a. if CR ih (5) Simple Lag : ° H ai d 1} i Re ¥ ' a t Vv, y ae Vp . vw =— , i Fig. 3. Circuit for simple lag . ‘ i | Ba In the circuit of Fig. 3. ; | 4 1 Zp=ReCp - Re Fe Rr +1_ 1 + pCsR¢ y, . Cp . V; %-Ry T+ pcre C¢ Re sets the time constant of the lag and Rg is the scale change. R1 More complextransfer functions can be formed by making Zs, Z1, Zg, etc. more complex. oe N. B. (6) Multiplying a Variable by a Constant k There is, necessarily, a sign reversal accompanying each operation involving a D.C. amplifier. Vi a: ar R (« \ VV Fig. 4(a). Coefficient potentiometer. Fig. 4(b). Symbolic representation of coefficient potentiometer. Neglecting the loading of the forward path impedance of the following amplifier Vo = + Vj. n then represents the value of the constant k “(7) Dividing a Variable by a constant k This may be accomplished with the circuit of Fig. 4(a) by calling the potentiometer 1, but it is often more convenient to resort to the circuit shown below in Fig. K 5. ; WN R Vv ! Fig. 5(a). Coefficient potentiometer in e feedback path. A >rA”=”—> a ae Fig. 5(b), Symbolic representation, Neglecting the loading of R¢ on the potentiometer Vo=-1 Rg - Vion Rj 1.3 Setting up a problem and programming the computer (1) The Flow Diagram There are in effect two different starting ponte depending on the problem to be ees A. When the information is given in the form of differential equations. This is so for ' most dynamical mechanical systems. 3 ' a te :. Spe ag a a ——— = = —— B. When the information is presented in the form of a system flow diagram with the transfer functions of the various paths in that diagram. The major group in this category is servo-control systems. In case A a reasonable approach is to rewrite the equation in operational form and segregate the terms containing the highest derivative, equating this to all other terms. Ne nee an ny ee If the highest derivative term is integrated a sufficient number of times to obtain the lowest, each derivative produced can be fed through suitable coefficient setting devices (and sign changes where necessary), then summed and equated to the original term (i.e. 3 the highest derivative). ° Example:- Second order with spring, mass, damping. 2 2 Xx+2C W, dx+WS. x= f(t) no n at2 6 dt : is damping ratio and W, is undamped natural frequency and f(t) the forcing function, ee tan Writing p for d and transposing dt px = -(2 Ewe + W2)x + f(t) Now the flow diagram can be drawn . ae ey Ne | Pp xc | x | SIGN : EVERSALS | Fig. 6. Computer flow diagram for second order differential equation. | The next step is to draw the computer schematic diagram. : | = —i— | a | Fig. 7. Computer Schematic diagram for second order differential equation. } Note: ~ Since each amplifier inherently reverses the sign, only one sign iaiaeioe amplifier (in the damping loop) is necessary. The coefficient setting devices are potentiometers connected as described inthe , sixth section under the previous heading. E a ae te When information exists in the form of a system flow diagram then the computer schematic canbe drawn directly from that diagram, each transfer function being simulated inturn by suitable amplifier-passive component combinations. Sometimes re-arrangement of the existing flow diagram simplifies the computer set-up. (2) The Time Scale ‘ Before deciding upon computer component values the problem time scale must be fixed. Investigations which involve simulating part of a system in conjunction with real components from that system are necessarily conducted in a1: 1 time scale. In other words, t secs. of computer time represent t secs, of real time. The 1:1 time scale is often suitable in applications where the whole system is simulated but there are occasions when a changed scale is much more convenient. Systems jh which physical variables change very slowly (process plant, heat exchangers, nuclear Ceactors - 8 etc.) may usefully be speeded up in the computer. It must, however, always be ia¢nem mind that in speeding up the computer its accuracy is decreased, Conversely, if a very fast real problem is being investigated (electrical networks, vibration isolators etc. ) the tim® scale must be slowed down in the interests of accuracy. (3) The Amplitude Scale Firstly it is desirable to know the maximum values which the time varying parameters are likely to reach with the conditions obtaining for the investigation. Then these maximum values are represented by voltages within the saturation voltage of a computer amplifier . which isa known quantity. This maximum computer voltage (in the case of Minispace 100 V) is often referred to as "the machine unit". The scale at a particular point inthe computer (i.e. of a particular physical variable) is defined as:- The number of units of the variable which represents one machine unit, this value of the variable being greater than, or equal to the maximum value expected of that variable during the computer run. ; ‘ The maximum values at which the constants are likely to be set are generally known, = © Chat r the scales of the potentiometers are greater than or equal to this value. Then the oSition «/ aof the potentiometer wiper sets the coefficient at a fraction n (see Fig. 4(a)) of the scale of the pot. In other words, the 106% potentiometer reading represents a chosen number of the units of the constant (this value of the constant being greater than or equal to the maximum value required during the total computation). Naturally the scale at one positionin a computer depends on the scale at the previous position, the gain of the amplifiers, and the scale of the coefficient potentiometers between those positions. Example:- Two variables in time connected by a proportionality constant. y = kx ~ (1) Maximum value of x is say 25 ins. /sec. (2) Maximum value of k is chosen as 20 square ins. (3) Assume that for initial studies k will be set lower than 4 sq. ins., then maximum value of y is 100 cu. ins. /sec. Then the scale of x is 25 ins. /sec. (i.e. 25 ins. /sec. is represented by 1 machine unit), the scale of y is 100 cu. ins. /secs. and the scale of the potentiometer is 20 sq. ins. ' (i.e, 100% on the pot represents 20 sq. ins. ). The following scaled computer schematic may.now be drawn. \ - 100 CU.IN/SEC 25 IN/SEC 20SO/IN ‘ ‘ Fig. 8. Scaled computer diagram for y = kx. Tocheck the scaling numerically from point Ato point B, take the scale at A, multiply ' it by the pot scale and divide by the amplifier gain. This should give the scale at B. -i,e. 25x 20x1 = 100 ; 3 Provided scaling is carried out using the principles defined, to obtain the scale at one point in the computer from the scale at a prior point, multiply by potentiometer scales and divide by amplifier gains in the path connecting those points, The scale change across an integrator is determined by the time constant of that integrator. For the purposes of scaling this can be considered in precisely the same way as the gainofthe scale change amplifier in the above example. If the scale at the integrator input is S units/machine unit, and the scale at the output is P units/machine unit, then P=1S where G= 1 G- RC Incomplex problems the variable maximums are not always known accurately, even so an intelligent estimate can usually be made. If, subsequently, this estimate proves to be grossly inaccurate, appropriate rescaling may be implemented. A potentiometer cannot be set to precisely the correct value on an associated dial because of the loading of the following impedance (which is changed for varying amplifier gains). InMinispace the potentiometers whilst correctly loaded are set against an adjustable reference. The above discussion on amplitude scaling is appropriate for setting up a computer inrealtime. To rescale the computer fora speedup ofStimes, the integrator time constants (the RC products) must be reduced in this ratio. The inverse applies for a slow down. (43 Initial Conditions The initial condition of the equations are set up as voltages held at the appropriate integrator outputs (may be zero volts) with due regard to the scaling set at these outputs. (5) Problem Check Before continuing the problem should be checked. A recommended procedure is:- (1): Check connections (2) Check potentiometer settings (3) Check initial conditions (6) Compute Having arranged suitable recording equipment (C, R.O., pen recorders etc. ) connect - ed to the desired outputs, the hold condition on the integrators may be released and the computation started. When the steady state solution has been reached, the computer can be reset, new initial conditions and coefficient values imposed and further solutions obtained. - 11 5 ms er om et a ee —— 1.4 12 There are, ofcourse, problems where the forcing functionis repetitive Rr response to sine wavesat various frequencies). The integrators are then held at zero until the forcing function is applied. Simulating simple discontinuities (1) Inert Zone +V¥p_ “Vo Eagan -+— mW ' : A “ +e ° v4 AAA -™. i 4 | aol +o Y, cee 8 Fe} ie - “pee Fig. $. Circuit for inert zone - neither diode conducts until|v,| = |e] (2) Limiter = = thy & he +Vg . was +0 Ny +O. == a 2 Vo Vi < ——J L$ -9 ra at -Vp Fig. 10, Limiter circuit - an inert zone in the feedback path, (3) Bi-directional 2-segment curve Re r hese ge 11. Two-segment curve. Slope of mid- section = _RF Rj + Ry + Ro Slope of outer section = Ry Rg + Rp (Ry + Ro) _=_oms Nii ts Nene at out) ve ‘ E = Ry +Ro9 Vv Rj B (4) -. Backlash’ +Vp = +05~— | — a %e | ---- ow, \- Fig. 12. Backlash simulation This circuit consists of an inert zone, a low time constant integrator (used as a voltage store while neither diode is conducting) and a phase reversal. Owing to integrator drift this circuit is only suitable in problems involving rapid changes. The integrator time constant has to be made as large as possible without introducing too much phase shift between Vj and Vp. Neglecting the inert zone = gf l+p <|< -~ °o where k is total forward path gain i.e. k=Ry : RC . So in order to keep the dynamic phase shift small, k must be as high as possible, i.e. Ry must be large and RC small. This is, however, not compatible with small drift rate so a compromise must be reached depending on the speeds at which the variables in the problem change, and the accuracy required. “ f \ 4 _— aa ~ \ \ ‘ e- ’ \ x 13 ee ee —— 5 aac SSS y “ene CUAPTER 2 OPERATING MINISPACE ‘ y aa | General Description of Minispace is . The Minispace analogue machine is a small console equipment containing the following i components. (1) Ten drift-corrected D.C. amplifiers type AA621. 2 mounted in two racks below the sloping patching desk. See appendix for specification of amplifiers. (2) Two heater supply units TS722.2 for the above amplifiers, mounted in the racks with the amplifiers. (3) Four stabilised power supply sub-units giving + 300 V with total current output of yr fs » 460mA + 100 V(0, 2%) 50mA reference supplies. There is spare power of 50 mA at + 300 V : _ for external units which may be used in conjunction with ''Minispace”. a ee x (4) A cooling fan. (5) Permanently wired input and feedback components associated with each amplifier. ‘ Two 100 K2 and two 1 M2 (0.1% tolerance, high stability) resistors in the forward path of alr amplifiers. In the "row A" amplifiers either a 1 Mo (0.1%) resistor or a 1 pF (0. 5%) 3 capacitor can be switched into the feedback path and in "'row B" amplifiers either a1 Ma or a 0.1 pF (0, 5%) feedback component can be selected. METER SWITCH RE FERENCE FUNCTION CO-EFFICIENT SETTING POTENTIOMETER SWITCH POTENTIOMETER oe NENI~ SPACE CONTSOL ante ovEmcad & ‘6 OO 28S HGS beL. PPT OS OSs. et .e - kD) G53 Sues B58 Ost ne) (a . Plate 1. Control and potentiometer Panel 14 ef. ee 2.2 (6) Twenty wirewoundten-turn helical potentiometers withone end permanently earthed, for coefficient and initial condition setting, attenuation etc. , and four similar earth-free potentiometers - all mounted on the lower half of the control panel. (7) Four pairs of diodes, each pair having one anode to cathode connection, to be used with the "earth free" potentiometers for the generation of discontinuous functions. (8) A centre-zero meter, with 3 ranges 1, 10 and 100 volts full scale, push button selected, mounted on the left hand side of the control panel. (9) A "Meter Switch", mounted adjacent to the meter, enabling the various supply and reference voltages to be monitored. (10) A direct reading ten-turn helical potentiometer (0.1% linearity) to be used in conjunction with the reference supply and the centre zero meter, to set coefficients and initial condition potentiometers. (11) \ A computer "Function Switch" which controls internal relays to give the following computer conditions; Potentiometer Set, Problem Check, Compute, Hold, and Repetitive. Coloured lights on the control panel indicate the selected condition. NOTE: Circuit diagram demonstrates clearly the automatically selected internal connections for each position of the function switch. (12) - Aneleven-position "Output Selector Switch", usedto monitor any of the ten amplifier outputs on the meter, and in the "OFF" position, the coefficient potentiometer outputs (via the associated key switches) or signals applied to the 'V" socket on the patch panel. (13) Acentral overload indicator which lights whenany amplifier overloads. Immediately below the overload indicator is a switch which may be used in conjunction with it. This switch will "hold" the computer in the overload condition when the individual amplifier overload neons may be inspected to discover which is the offending unit. All items 6 - 13 inclusive are mounted on the control panel. (14) A patching panel mounted onthe sloping desk below the central panel. Multicoloured 3 mm sockets are used throughout to which amplifier, potentiometer, computing element ~ and diode connections are made. A complete description of the patch panel is given in the section headed "Patching". (15) A multiway socket (ona Ssub-panel on the back of the equipment) to which all connections are :ade to enable two Minispace computers to be coupled together and operated as a single unit from one of the control panels. (16) Five coax sockets (on the same sub-panel as the multiway plug), four being outputs to recording equipments, the fifth providing atrigger pulse signal for synchronising external equipment (e.g. an oscilloscope). Setting up procedure (1) Switch output Selector Switch to OFF, overload hold switch to OFF and Function Switch to POT SET. (2) Check all mains selector panels, including the fan input voltage on the auto- transformer, (to ensure that this corresponds with local mains supply) and connect up to the mains. Switch on and allow several minutes as a warming up period. (3) Check the 300 volt power suppliesusing the control panel meter. There are positions on the meter switch which enable each of the 4 power supply unit outputs to be separately monitored. (Ifthese are not.within 2% of nominal they may be adjusted in turn by potentio- meters on the power units). (4) Check the 24 V supply and the + 100 V reference supply, again on the meter switch. The 24 V supply should be within + 2 V andthe reference supplies can be adjusted by potentio- meters RV1 and RV2 on the chassis at the back of the contro] panel (rear accessibility). ~ 15 —_ ~~ in Ser ae 2 = aT Tr (5) To zero the amplifiers AA621.2 press the balance indicator button, If the nea strikes adjust the balance potentiometer until the lamp is extinguished. Hold the button, for a few moments to check that the neon does not restrike. Each amplifier has its om neon indicator and balance controls on its own individual panel. (6) Switch all amplifiers to sum, and Function Switch to Problem Check, Compute, Hold and the three Repetitive positions inturn, noting that the appropriate lamp is illuminated. Repeat with all amplifiers switched to INT. Monitor all outputs under all the above conditions with the Output Selector Switch and with 4 4 4 ‘the Meter Switch on position V. All output voltages should be zero. 2.3 Patching Minispace (1) General Description of Patch Panel ey Plate 2. The Patch Panel Onthe patch panel there are ten similar groups of 25 multicoloured 3 mm sockets, marked A, 1 to 5 and B, 1 to 5, and two unique groups of 36 sockets each. Each group of 25 is associated with the computing elements fora particular amplifier. The following is a list of the connections to the sockets of a 25 way group. These ae can be seen in Circuit Diagram included in this handbook. if n - 1. The 4 white inter-connected sockets at the top of each group are for use as : a spare multiple link. : vs, 2. SJ1 (green) is the junction of the internal summing resistors. 3. The two "1" sockets (blue) are inputs to the two 1 M2 summing resistors, _ i.e. unity gain inputs. task? 4, The two "10" sockets (blue) are inputs to the two 100 K2 summing resistors, 4 i.e. ten gain inputs. : 2 5. SJ (green top centre) is the amplifier input. 3 6. SJ2 (green immediately below SJ) is the amplifier input end of the internal feedback element. ” 7. OP (4 linked yellow sockets) is the amplifier output. 8. OP1 (yellow) is the output end of the internal feedback element. 9. . +100 V (red & purple) are reference supplies. 10. H1, H2 (orange) and Al, A2 (orange) are the "high" ends and armatures respectively, of the potentiometers associated with the group. 11, IC (two red commoned sockets) is the input for the initial condition voltage. 12, EC(white). Each EC isconnectedtoapinonthe multiway external connection socket (see circuit diagram), enabling connection to be made from any amplifier to associated apparatus without the embarrassment of long "flying" leads. The top 36 way group is connected to the free pots, the diode pairs, signal ground, the voltmeter, recording outputs and the multiway terminations for external control functions. The connections are as follows: - 1; RowsH, A, Lbycolumns1, 2, 3, 4 (all orange) are "high" end, "armature" and "low" end connections to free pots. 2s Rows a, (blue), j, (green), k, (red), are adequately explained in Circuit 2 Diagram. 3. Three black sockets marked SG are signal ground. , 4, The purple socket V in the same row as SG is the meter input. 5. Rl, R2, R3, R4 (white) are connected to the coax output recorder sockets on the back of the equipment. 6. The two pairsofIP, OP, socket (blue and yellow respectively) are connected to the multiway external connection socket. They are intended as extra input/output connections to associated equipment. The lower 36 way group is the patch panel for the two servo-multipliers which may be included to expand the facilities of the machine. Inaddition there are two groups of sockets on the narrow penal between the control andpatchpanels. The first group has six sockets connected to the contacts of the adjacent double pole changeover switch. The second group has eight sockets connected to the coil and double pole changeover contacts of a relay. Thus single or double pole, on-off or changeover operations may be patched for manual or remote operation. (2) Patching Specific Operations Transfer functions are connected using the patch cords and two-pin link plugs provided and the integrate/sum switches. The following operations are patched using the internal computing components. For all operations using the internal feedback elements two-pin links should be used to connect SJ to SJ2 and OP1 to the lowest OP socket. (a) Summing The switch associated with the amplifier patching group should be switched toSUM. Internal relaysthen make the circuit shown in Fig. 13 available; a summer with 2 unity gain and 2 ten times inputs. This circuit is open to variation. For instance a patch cord might be used to connect an OP socket toa "1" input. There are thentwo 1 M@ resistors in parallel in the feedback path giving two inputs gain 5 and one gain 0. 5. 17 - a rr ae ee : ae 7 | aes = be ae dee | ? ry a +e + me, sJt. | oO oO {. o}] ) IM ‘ae. ° mS, O IM 2 WAY > oP | Oo ? LINKS re) 100K } 10 | O rw? fe) J . a 5 1OOK]. 1M OPI WNh— oO Fig. 13. Summing circuit. (b) Integrator .The switch associated: with the amplifier patch group must be switched to INT. The circuit available is then as in Fig. 13 but the 1 M& feedback resistor becomesa 1.0»F capacitor for A row amplifiers and a 0.1 »F for B row amplifiers. Thus for A row amplifiers there are two integrator inputs at 1 sec. time constant and two at 0.1 secs. and for B row two at 0.1 secs. and two at 0.01 secs. ‘(e) Simple Lag 1/(1 + pT) The sum/integrate switch must be at INT. Connect an OP socket to either a''l"or "10" input socket with a patch cord. Then the chosen forward path resistor in fact becomes a feedback resistor in parallel with either a 1 pF or 0.1 »F capacitor as shown in Fig. 14. PATCH CORD ssi [O }— —L Oo} ) ay Beer | TO Fig. 14. Simple Lag (A-row amplifier) - 1 1+p - 7 OP With the circuit patched as shown Vo >=- 1 = , Vi “T+p ee ~® ae aes es tt ka 3 If the patch cord linked OP with a "10" input socket Vo=- 1 4 Vi 10 1+p/i0 Other combinations can be obtained as desired. For example, two input resistors couldbe paralleled into the feedback path, perhaps using the spare 4-way multiple as further amplifier output sockets if required, merely by linking it to an OP socket. In this way either 506 K2 or 50 KQ, say, could be put in parallel with the feedback capacitor and at the same time several amplifier output sockets would still be available. (d) Multiplying and Dividing by a Constant Potentiometers are used specifically for this purpose (i.e. as coefficient setting devices) but they are also very useful as simple attenuators or to give non- integral values of amplifier gain or integrator time constant. They are similarly patched in any employment. An example of multiplying one constant "1" and dividing by another "m" is shown in Fig. 15 to illustrate the method of patching potentiometers. (m»- ww —(fn) (t) Fig. 15(a). Multiplying a variable f(t) by "1" and dividing by "'m". st SJ [a) mal bachipean - 2 & SJ2 > OP O rs) ifo oO Ye a & re) tok ie) i om U ys U < 4 lo} O FA WAY Oo OPI HOO a O | -100 v Lo Ge | Vv INPUT £0 HI | O Al / Fig. 15(b). Minispace patching for Fig.-15(a). 19 N.B. There is no 2-way link from OP1 to OP. (e) Example Description of patching the equation y = kx from CHAPTER 1, Section 1. 3(3), scaled as in that section. Use amplifier ''Al'' as a scale change and '"'A2" as a sign reversal, and potentiometer ''Al" for the coefficient k. (1) For both amplifiers the sum/integrate switch is set at SUM, and connections SJ to SJ2 and OP1 to OP are made. (2) Input signal x goes into the "high" end H1 of potentiometer "Al". The armature socket Al of this pot is patched to one of the 10 gain inputs of "Al" amplifier. (3) Patch from an OP socket of "Al" amplifier to one of its own input sockets. This amplifier then has the correct gain of 5. (4) Another patch cord connects a further "Al" amplifier OP socket toa "1" 4 input of ''A2" amplifier. (5) The output y then comes from OP of "'A2" amplifier. Setting the coefficient potentiometer is described under the first heading of the next section ''Computer Functions". (f)° | More Complex Transfers Witha little ingenuity more complex transfer functions can be patched using the internal components. Also, if the links SJ to SJ2 and OP1 to OP are not made, complex filters can be used as the feedback impedances of the amplifiers. External forward path elements can be patched into SJ1 as required. 2.4 Computer Functions (1) 20 Setting Coefficient Potentiometers (a) Turn the Meter Switch to NULL and the Function Switch to POT SET. This latter earths the summing junction of the forward path components. All coefficient potentiometers are then correctly loaded by their respective amplifier forward path resistors earthed at the summing junction end. (b) Set the reference potentiometer onthe control panel tothe required coefficient value. (c) Connect the + 100 V reference to the "high" end of the reference potentiometer by means of the associated key switch. (d) Depress the key switch associated with the specific coefficient pot. This disconnects the "high" end of the potentiometer from the H patch socket and connects ittothe+100V reference, and simultaneously connects the potentiometer armature (wiper) to the meter through the sensitivity. changing network. (e)- | Adjustthe coefficient potentiometer until balance is indicated on the meter. (f) Repeat (e) with the 10 V range selected on the appropriate push button. (g) Repeat (e) with the 1 V range selected. When a null has been attained zero current flows into the meter, so the reference potentiometer is not loaded and the coefficient potentiometer has only its correct load (i.e. of the amplifier input impedance). ; etd | +hOOV RANGE REF COEFF CT POT SELE + IOOV REF. a ‘ NULL REF METER POT ee Fig. 16. Circuit for setting coefficient potentiometer. (2) Setting Initial Conditions (a) Turn the Meter Switch to NULL and the Function Switch to POT SET. All amplifiers switched to integrate -henhave extra forward path and feedback resistors introduced as shown in Fig. 17. SJ “SJI [o | ° SJ2 IlOK ; [o] -100V |OOK Ic ic - Fig. 17. Setting Initial Conditions. (b) Link the "high" end of the initial condition potentiometer to the 100 V reference (select the correct polarity remembering that there is a sign reversal in the amplifier), Thenpatchthe armature of that potentiometer to one of the 1C sockets. (c) Monitor the voltage at the skegzatan output by turning the Selector Switch to the appropriate position. (d) Set up the initial condition on the reference potentiometer. (e) Using the associated key switch connect either the positive or negative 100 V reference to the. reference potentiometer. The polarity must correspond with that of the initial condition. the See 22 (f) Adjust the _referenee pot until a null is obtained, exactly as for coefficient setting. The initial condition resistors are 2% tolerance. The ratio of 1.1 tol chosen between the feedback and forward paths thus allows all voltages from 0 - 100 to be easily obtained at the integrator output even under the worst tolerance conditions. (3) Problem Check (a) Turnthe Function Switch to the PROBLEM CHECK position. All integrators are theninthe same conditionasfor POTSET. All summing amplifiersare connected as they would be for computing. (b) Scan the integrator outputs on the meter with the Selector Switch, the Meter Switch being turned to position V. This checks the initial conditions as a direct voltmeter reading. (c) The procedure of Coefficient Setting can be repeated as a check. All summing amplifier outputs may be monitored using the Selector Switch. These voltages will be dependent on the initial conditions on the first previous integrators, the correct amplitude and polarity being easily determined from inspection of the computer schematic diagram. (4) Computer . When COMPUTE is selected on the Function Switch internal relays automatically release the integrators (i.e. remove the initial condition resistors) and simultaneously reconnect the summing junctions to the integrator amplifier inputs. The circuit is then exactly as the computer schematic. (5) Hold The Function Switch may be turned to HOLD at any desired time after computing has started. This disconnects the summing junctions of the forward path elements from the integrator amplifier inputs and earths them. This leaves the feedback capacitor charged at the precise voltage when computing is arrested. The problem can be frozen at any time t after the commencement of the compute period and the solution at this time recorded at leisure on D.C. recording devices (see appendix). (6) Repetitive There are three repetitive positions on the Function Switch, automatically switching the computer between the COMPUTE and PROBLEM CHECK (called "RESET" for this purpose) conditions. Position 1 1 sec. compute period 1 sec. reset Position 2 2 sec. compute period 1 secr reset Position 5 5 sec. compute period 1 sec. reset (7) Accurate Measurement of D.C. Voltages The null method may be used to measure accurately unknown D.C. voltages. The Meter Switch should be turned to NULL, the voltage patched to the V socket on the upper 36 way patch group, the reference supply of the appropriate polarity applied to the reference potentiometer, and the reference potentiometer adjusted to attain meter balance. Then the measured value is obtained as a dial reading on the potentiometer. ———— — = ye Lilet Aare Oath, raat ' © i all Be ra i ea ee om APPENDICES ' r Appendix 1. ; _ Specification of D.C. amplifier AA 621.2 DC Amplifier AA621.2: DC Gain: >30 x 108; at 100 c/s >10 x 10°. Drift : < 100unV (Long Term) Referred to ae Typically 202V per day Summing Noise : Typically 100uV Junction Unity Integrator Drift : (1uF and 1MQ) < 1002 V/sec. Bandwidth (3db) : 16 Kc/s at x 10 gain. o (1IMQ Feedback) : 9 Ke/s at x 100 gain. U] ' Typical safe capacitance loading with a 1M Q feedback resistor 10,000 pF at output with 250 pF at summing i junction. ni Output : >-+ 100V into: 20k2 or 10kQ. 4 HT Consumption + 300V at 20mA or 31mA “ Max: At + 100V o/p f — 300V at 19mA or 25mA Appendix 2. The Differentiating Circuit Intheory a differentiating circuit is easily obtained. A computing amplifier with a capacitor in the forward path and a resistor in the feedback path gives the transfer function. Vo = - pCR (p being d ) Vi dt ° However, such a circuit has the following disadvantages which preclude its use. ae (a) The gain increases with frequency, at a rate of 6 db/octave, so spurious high iw ; frequency voltages which appear at the input (due to pick up, thermal noise in resistors 1? ~ etc.) are greatly amplified, perhaps to such an extent that the signal may be swamped. (b) The feedback amplifier stability margin is greatly decreased. Flow diagrams which seem to demand the use of differentiators can often be re-arranged to exclude them. If this is inherently prohibited the differéhtiation may possibly be accomplished with sufficient accuracy over a limited frequency range with the circuit shown in Fig. 18. Ro R Cc Ol im we Fig. 18. Vg=- PCR2 23 For frequencies at which pCR; << 1 Vo = - pCRg, and the circuit behaves as a differentiator. Vi When pCRy >> 1 Vo=- Ra Yi RY Thus the gain/frequency response characteristic flattens out at the high frequency end. Appendix 3. Computer Limitations t, To show that the accuracy of computation depends on the amplifier open loop gain. Firstly, to define the amplifier open loop gain YL consider the circuit of Fig. 19. ae) Zfb V; : u &g S Vo (Cpe en . = . Zz S3 : Eg Fig. 19. Generalised computer amplifier in open loop condition. The forward path gainis Vp =- @% = =------------------- (1) Ey The feedback path gain (with input earthed) is Es= Mai ia aca a (2) Vo Zi + Zep % So the total gain Y; aroundthe amplifier loop when the switch at the summing node is closed is given by re) ViwEge>n Sy i 3-§ + . .S#etteteeeesssern--- (3) Vo(_1+1 (1 +1) )=- My (see section 1, 2(1) Chapter 1) which may be written ae) or Vi Zi (l+Zi+Zp) 2 wwe nnn n ne nn------- (4) ( ot Zj ) cin : Gs Vos Ze(T-T) =§- «mame ener (3) ss ki Y%s&t Ww ‘st te Thus Yj, must be very high in order that Vo = - Zep a Vi i 24 TP ne re For a summing amplifier Zj represents all the forward path resistors in parallel. So, depending onthe computation accuracy required and the various values of the computing elements, the number of inputs is limited. Considering a specific case; assume that the required accuracy is 0.1% at 100 c/s (neglecting the tol